DSP-MLIR : Digital Signal Processing Compiler in MLIR

nZDC : LLVM based compiler for near zero silent data corruption.

LLVM-r Resilience-aware LLVM based compiler with instruction-based duplication for error protection.

Expert Error detection support with redundant multi-threading.

GemV Micro-architecture vulnerability estimation tool (based on gem5 simulator).
For a brief summary of error resilience tools, please visit this page.

dMazeRunner Dataflow optimization infrastructure for coarse-grain programmable accelerators.

DiRAC Architecture template and cycle-level microarchitecture simulator for dataflow accelerators.

CCF CGRA compilation and simulation framework.

CCF CGRA compilation and simulation framework.

SMM toolchain Toolchain for application execution on SMM architectures.

TMA Timestamp based monitoring tool for CPS applications.

Jobbed RTOS for the Raspberry Pi 2B