Publications

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1.

Sandro Neves Soares; Ashok Halambi; Aviral Shrivastava; Flavio Rech Wagner; Nikil Dutt

Adaptive Reduced Bit-width Instruction Set Architecture (adapt-rISA) Proceedings Article

In: VLSI-SOC 2009 :Proceedings of the 17th IFIP/IEEE International Conference on Very Large Scale Integreation, 2009.

BibTeX | Tags: Low-power Computing, RISA | Links:

2.

Aviral Shrivastava; Partha Biswas; Ashok Halambi; Nikil Dutt; Alexandru Nicolau

Compilation framework for code size reduction using reduced bit-width ISAs (rSAs) Journal Article

In: ACM Transactions on Design Automation of Electronic Systems, vol. 11, no. 1, pp. 123-146, 2006, (ISSN 1084-4309).

BibTeX | Tags: Low-power Computing, RISA | Links:

3.

Aviral Shrivastava; Nikil Dutt

Energy efficient code generation exploiting reduced bit-width instruction set architectures (rISA) Proceedings Article

In: ASP-DAC '04: Proceedings of the 2004 conference on Asia South Pacific design automation, pp. 475-477, 2004, (ISBN 0-7803-8175-0).

BibTeX | Tags: Low-power Computing, RISA | Links:

4.

Ashok Halambi; Aviral Shrivastava; Partha Biswas; Nikil Dutt; Alexandru Nicolau

A design space exploration framework for reduced bit-width instruction set architecture (rISA) design Proceedings Article

In: ISSS '02: Proceedings of the 15th international symposium on System Synthesis, pp. 120-125, 2002, (ISBN 1-58113-576-9).

BibTeX | Tags: Low-power Computing, RISA | Links:

5.

Ashok Halambi; Aviral Shrivastava; Partha Biswas; Nikil Dutt; Alexandru Nicolau

An Efficient Compiler Technique for Code Size Reduction Using Reduced Bit-Width ISAs Proceedings Article

In: DATE '02: Proceedings of the conference on Design, automation and test in Europe, pp. 402, 2002.

BibTeX | Tags: Low-power Computing, RISA | Links: