JiaChing Chuang is a Ph.D. student in the School of Electrical, Computer, and Energy Engineering at Arizona State University. He holds a B.S. from Chang Gung University (Taiwan) and an M.S.E. from ASU. As a research assistant in the Analog/Mixed-Signal VLSI Group, he designed a voltage-reference buffer and a time-to-digital converter (TDC). His research interests focus on analog and mixed-signal integrated-circuit design.
