{"id":33,"date":"2017-08-17T23:28:14","date_gmt":"2017-08-18T06:28:14","guid":{"rendered":"http:\/\/ubmixedsignals.eng.buffalo.edu\/?page_id=33"},"modified":"2021-07-20T16:30:11","modified_gmt":"2021-07-20T23:30:11","slug":"members","status":"publish","type":"page","link":"https:\/\/labs.engineering.asu.edu\/mixedsignals\/members\/","title":{"rendered":"People"},"content":{"rendered":"\r\n
\r\n
\r\n

Principal Investigator:<\/strong><\/h4>\r\n

\"\"<\/strong>Arindam Sanyal <\/strong>is an Assistant Professor in the School of Electrical, Computer and Energy Engineering at Arizona State University. Prior to this, he was an Assistant Professor in the Electrical Engineering Department at The State University of New York at Buffalo. \u00a0He received his Ph.D. from The University of Texas at Austin in 2015 and his M.Tech from The Indian Institute of Technology, Kharagpur in 2009. He was a Design Engineer working on low jitter PLLs at Silicon Laboratories, Austin. His research interests are 1) analog\/mixed signal and radio frequency integrated circuit design 2) machine-learning enabled intelligent sensors for personalized at-home healthcare 3) hardware security. email:<\/strong> arindam.sanyal[at]asu.edu<\/p>\r\n

PhD Students:<\/strong><\/h4>\r\n

Arizona State University<\/h4>\r\n

\"sumukh\"Sumukh Bhanushali <\/strong>is a PhD student in the School of Electrical, Computer and Energy Engineering at Arizona State University. He completed his Bachelor of Technology in Electronics engineering from K.J. Somaiya college of engineering, Mumbai, and MS from University at Buffalo. He is specializing in digital and mixed signal VLSI (mainly switched capacitor amplifiers and circuits for neural networks), solid state devices including FinFETs, 2D electronics, device layout and fabrication. email:<\/strong> spbhanus[at]asu.edu<\/p>\r\n

\u00a0<\/h5>\r\n

Vasundhara Damodaran<\/strong> is a PhD student in the School of Electrical, Computer and Energy Engineering at Arizona State University, majoring in Electrical Engineering. She received her Bachelor\u2019s Degree from College of Engineering, Trivandrum and Master’s Degree from IIEST, Shibpur.\u00a0\u00a0She also has prior experience as an Analog Layout Engineer where she was associated with PDK development and analog design in various technology nodes, till tapeout.\u00a0\u00a0Her primary interest lies in analog VLSI Design. email:<\/strong> vdamoda2[at]asu.edu<\/p>\r\n

\u00a0<\/h5>\r\n

University at Buffalo<\/h4>\r\n

Sudarsan Sadasivuni<\/strong> graduated with Masters from the University of Houston, Texas. During Masters, he worked on developing models that 1) differentiate nerve connections from eyes to brain in a healthy body from diabetes patient, 2) determine parameters that affect myopia using infrared distance measuring sensors.\u00a0\u00a0He is now a student at the University of Buffalo in the Department of Electrical Engineering with a concentration in Machine Learning. His primary research interest is in developing machine learning algorithms for medical applications, and ADC circuit designing. email:<\/strong> ssadasiv[at]buffalo.edu<\/p>\r\n

M.S Students:<\/strong><\/h4>\r\n

PhD\u00a0Alumni:<\/strong><\/h4>\r\n

\"12222222\"<\/strong><\/p>\r\n

 <\/p>\r\n

Mohammadhadi Danesh<\/strong>\u00a0received his PhD from University at Buffalo in Spring 2020. His research interests are in 1) MASH VCO-based ADC design 2) analog current-mode circuits design. He is currently with Cirrus Logic, Austin. email:<\/strong> mdanesh[at]buffalo.edu<\/p>\r\n

\u00a0<\/div>\r\n
\u00a0<\/div>\r\n
\u00a0<\/div>\r\n
\u00a0<\/div>\r\n
\"\"<\/strong><\/div>\r\n
\u00a0<\/div>\r\n

Sanjeev Tannirkulam Chandrasekaran<\/strong> received his PhD from University at Buffalo in Spring 2021, majoring in Electrical Engineering, with an emphasis on microelectronics. His primary research interest is in Analog\/Mixed-Signal IC design with an inclination towards the design of delta-sigma ADCs, time-to digital converters, and ultra low power circuits for applications spanning from biomedical instruments to data converter circuits. He is currently with Silicon Laboratories, Austin. email:<\/strong> stannirk[at]buffalo.edu<\/p>\r\n

\u00a0<\/h5>\r\n

MS Alumni:<\/strong><\/h4>\r\n

Vinay Elkoori Ghantala Karnam (Analog Rails);\u00a0<\/strong>Tushar Gupta (Analog Devices<\/strong>); Darshil Trivedi (Analog Devices<\/strong>); Naveen Ramesh (Qualcomm<\/strong>)<\/p>\r\n

Anish Madurai Narayanamurthy;\u00a0Akshay Jayaraj (Intel Corporation<\/strong>);\u00a0Abilash Venkatesh (Mathworks<\/strong>)<\/p>\r\n

Ishita Gupta (Intel Corporation<\/strong>);\u00a0Ruobing Hua;\u00a0Srinivas Arcot (Intel Corporation<\/strong>)<\/p>\r\n

Illakiya Venkatesh (Microsoft<\/strong>);\u00a0Gaurav Kapoor (Intel Corporation<\/strong>);\u00a0Nikilaesh Ashok Uday Kumar (Analog Rails<\/strong>)<\/p>\r\n

Shivi Chaturvedi (Chentronics<\/strong>);\u00a0Nimish Nitin Gujarathi (Starkey Hearing Technologies);\u00a0<\/strong>Sai Mullapudi (Micron Technologies<\/strong>)<\/p>\r\n

Aishwarya Bahudhanam Venkatasubramaniyan (Intel Corporation<\/strong>);\u00a0Archana Ganesh\u00a0(Analog Devices<\/strong>)<\/p>\r\n

Saahithi Yammanuru (Global Foundries<\/strong>)<\/p>\r\n<\/div>\r\n<\/div>\r\n","protected":false},"excerpt":{"rendered":"

Principal Investigator: Arindam Sanyal is an Assistant Professor in the School of Electrical, Computer and Energy Engineering at Arizona State University. Prior to this, he was an Assistant Professor in the Electrical Engineering Department at The State University of New York at Buffalo. \u00a0He received his Ph.D. from The University of Texas at Austin in…<\/p>\n","protected":false},"author":135,"featured_media":0,"parent":0,"menu_order":8,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_acf_changed":false,"footnotes":""},"class_list":["post-33","page","type-page","status-publish","hentry"],"acf":[],"_links":{"self":[{"href":"https:\/\/labs.engineering.asu.edu\/mixedsignals\/wp-json\/wp\/v2\/pages\/33","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/labs.engineering.asu.edu\/mixedsignals\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/labs.engineering.asu.edu\/mixedsignals\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/labs.engineering.asu.edu\/mixedsignals\/wp-json\/wp\/v2\/users\/135"}],"replies":[{"embeddable":true,"href":"https:\/\/labs.engineering.asu.edu\/mixedsignals\/wp-json\/wp\/v2\/comments?post=33"}],"version-history":[{"count":0,"href":"https:\/\/labs.engineering.asu.edu\/mixedsignals\/wp-json\/wp\/v2\/pages\/33\/revisions"}],"wp:attachment":[{"href":"https:\/\/labs.engineering.asu.edu\/mixedsignals\/wp-json\/wp\/v2\/media?parent=33"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}