{"id":21,"date":"2017-08-17T19:47:44","date_gmt":"2017-08-18T02:47:44","guid":{"rendered":"http:\/\/ubmixedsignals.eng.buffalo.edu\/?page_id=21"},"modified":"2026-03-11T08:46:43","modified_gmt":"2026-03-11T15:46:43","slug":"publications","status":"publish","type":"page","link":"https:\/\/labs.engineering.asu.edu\/mixedsignals\/publications\/","title":{"rendered":"Publications"},"content":{"rendered":"

2026<\/h4>\n

[C1] Tushar Gupta, Vasundhara Damodaran, Yuan Liao, Jae-sun Seo, and Arindam Sanyal, \u201cDelta-Sigma Modulator-Based Compute-in-Memory Neural Network with Analog Feature Extraction and Classification for Edge Sensors”, IEEE International Symposium on Circuits and Systems (ISCAS) 2026.<\/em><\/p>\n

[C2] Shamma Nasrin, Matt Kinsinger, Anoop Bengaluru, Jia-Ching Chuang, Sumukh Bhanushali, Arindam Sanyal, “Residual Convolutional Neural Networks for Digital Calibration of Oversampled ADCs“, IEEE International Symposium on Circuits and Systems (ISCAS) 2026.<\/em><\/i><\/p>\n

[C3] Tushar Gupta, Vasundhara Damodaran, Jose Sanchez, and Arindam Sanyal, \u201cRespiratory Disease Prediction from Lung Sounds Using Reservoir Computing”, IEEE International Symposium on Circuits and Systems (ISCAS) 2026.<\/em><\/i><\/p>\n

[C4] Zuwei Guo, Jie Fu, Sumukh Bhanushali, Zehua Zeng, Imon Banerjee, Arindam Sanyal, \u201cBalancing Speed and Accuracy for Robust Analog-Mixed Signal Circuit Design using Closed-Loop Reinforcement Learning with Ensemble Neural Network Surrogates“, IEEE International Symposium on Circuits and Systems (ISCAS) 2026.<\/em><\/i><\/p>\n

[C5] Shamma Nasrin, Matt Kinsinger, Anoop Bengaluru, Jia-Ching Chuang, Sumukh Bhanushali, Arindam Sanyal, “Train Once, Calibrate Always: Machine-Learning-Assisted Blind Calibration for Analog-to-Digital Converters”, Design Automation Conference (DAC), 2026.<\/em><\/p>\n

\n

2025<\/h4>\n

[J1] Sumukh Prashant Bhanushali and Arindam Sanyal, “A 13.2fJ\/Step 74.3-dB SNDR Pipelined Noise-Shaping SAR+VCO ADC”, IEEE Open Journal of the Solid-State Circuits Society (OJ-SSCS), 2025. [PDF]<\/a><\/em><\/p>\n

[J2] Sanchari Das, Shruti Konwar, Sanjay Kumar, Arindam Sanyal and Bibhu Datta Sahoo, \u201cAn 8-bit Split CDAC-Based Noise-Shaping SAR ADC in 180 nm CMOS for Power Efficient Digitization of Sensor Signals\u201d, IEEE Transactions on Instrumentation and Measurement, 2025.[PDF]<\/a><\/em><\/p>\n

[J3] Jose Sanchez, Sumukh Bhanushali, Sudarsan Sadasivuni, Imon Banerjee, and Arindam Sanyal, “Low-Power Flexible Classifier Chip for Atrial Fibrillation Detection”, IEEE Transactions on Circuits and Systems for Artificial Intelligence, 2025<\/em>. [PDF]<\/a><\/em><\/span><\/p>\n

[C1] Matthew Kinsinger, Anoop Bengaluru, Jia-Ching Chuang, Sumukh Bhanushali, Arindam Sanyal, \u201cMostly Digital, Calibration-Free, Band-Pass Delta-Sigma Modulator using Dual Time-Interleaved Noise-Shaping SAR ADCs\u201d, IEEE Radio Frequency Integrated Circuits Symposium (RFIC)<\/em>, 2025. [PDF]<\/a><\/em><\/p>\n

[C2] Sumukh Bhanushali, Debnath Maiti, Phaneendra Bikkina, Esko Mikkola and Arindam Sanyal, \u201cCircuits-Informed Machine Learning Technique for Blind Open-Loop Digital Calibration of SAR ADC\u201d, IEEE Radio Frequency Integrated Circuits Symposium (RFIC)<\/em>, 2025. [PDF]<\/a><\/em><\/p>\n

[C3] Sumukh Prashant Bhanushali, Shamma Nasrin, <\/strong>and Arindam Sanyal, \u201cMachine-learning based Blind Digital Calibration of Time-Interleaved ADC\u201d, Special Sessions on IEEE VLSI Test Symposium (VTS), <\/em>2025. [PDF]<\/a><\/em><\/p>\n

[C4] Tushar Gupta, Vasundhara Damodaran, Jose Sanchez, and Arindam Sanyal, \u201cHeart Abnormality Detection from Phonocardiogram Signals Using Reservoir Computing\u201d, IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), 2025. [PDF]<\/a><\/i><\/em><\/p>\n

[C5] Tushar Gupta, Vasundhara Damodaran, and Arindam Sanyal, “Reservoir Computing based AI for Estimating Remaining Useful Life of Turbofan Engine”, <\/span>IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), 2025. [PDF]<\/a><\/i><\/em><\/p>\n

[C6] Jose Sanchez, Tushar Gupta, Vasundhara Damodaran, Imon Banerjee, and Arindam Sanyal, “Prediction of Acute Kidney Injury Onset Using Electrocardiograph and Demographic Data Through Reservoir Computer On-Chip”, IEEE Biomedical Circuits and Systems Conference (BioCAS), <\/em>2025.\u00a0[PDF]<\/a><\/em><\/span><\/p>\n

\n

2024<\/h4>\n

[C1] Debnath Maiti, Sumukh Bhanushali, and Arindam Sanyal, “Late Breaking Results: Machine Learning Based Reference Ripple Error Suppression in Successive Approximation Register Analog-to-Digital Converters”, Design Automation Conference (DAC), 2024. [PDF]<\/a><\/em><\/p>\n

[C2] Sumukh Bhanushali, Tushar Gupta, Debnath Maiti, and Arindam Sanyal, “Machine Learning Based Static and Dynamic Error Calibration in Data Converters”, IEEE VLSI Test Symposium (VTS), (invited paper), 2024.[PDF]<\/a> <\/em><\/p>\n

[C3] Sumukh Bhanushali, and Arindam Sanyal, “Enhancing Performance of SAR ADC Through Supervised Machine Learning”, IEEE International Symposium on Circuits and Systems (ISCAS) 2024. [PDF]<\/a><\/em><\/p>\n

[C4] Jose Sanchez, Sumukh Bhanushali, Sudarsan Sadasivuni, Imon Banerjee, and Arindam Sanyal, “Mixed-Signal Classifier Chip on Flexible Substrate for Cardiovascular Health Monitoring”, IEEE Biomedical Circuits and Systems Conference (BioCAS), <\/em>2024. [PDF]<\/a><\/em><\/p>\n

[C5] Vasundhara Damodaran, Jose Sanchez, Tushar Gupta, Phaneendra Bikkina, Esko Mikkola, Abdul-Muhsin Haidar, Imon Banerjee, and Arindam Sanyal, “AI-Enabled Fusion of Electrocardiograph and Demographics for Prediction of Acute Kidney Injury Onset”, IEEE Biomedical Circuits and Systems Conference (BioCAS), <\/em>2024.[PDF]<\/a><\/em><\/p>\n

\n

2023<\/h4>\n

[J1] Vasundhara Damodaran, Ziyu Liu, Jian Meng, Jae-sun Seo and Arindam Sanyal, “SRAM In-Memory Computing Macro With Delta-Sigma Modulator Based Variable-Resolution Activation”, IEEE Solid-State Circuits Letters<\/em>, 2023.[PDF]<\/a>\u00a0<\/em><\/p>\n

[J2] Sudarsan Sadasivuni, Monjoy Saha, Sumukh Bhanushali, Imon Banerjee and Arindam Sanyal, “In-sensor artificial intelligence and fusion with electronic medical records for at-home monitoring”, IEEE Transactions in Bio-medical Circuits and Systems (TBioCAS)<\/em>, pp. 312-322, vol. 17, no. 2, 2023. [PDF]<\/em><\/a><\/p>\n

[C1] Sumukh Prashant Bhanushali, Sudarsan Sadasivuni, Jose Sanchez, Imon Banerjee and Arindam Sanyal, “Fully Integrated Mixed-Signal Classifier for Cardiovascular Health Monitoring”, IEEE Biomedical Circuits and Systems Conference (BioCAS), <\/em>2023.[PDF]<\/a><\/em><\/p>\n

[C2] Vasundhara Damodaran, Ziyu Liu, Jae-sun Seo and Arindam Sanyal, “A Delta-Sigma Based SRAM Compute-in-Memory Macro for Human Activity Recognition”, IEEE Biomedical Circuits and Systems Conference (BioCAS), <\/em>2023.[PDF]<\/a><\/em><\/span><\/p>\n

[C3] Sumukh Prashant Bhanushali and Arindam Sanyal, “A 13.2fJ\/Step 74.3-dB SNDR Pipelined Noise-Shaping SAR+VCO ADC”, IEEE European Solid-State Circuits Conference (ESSCIRC)<\/em>, 2023 [PDF]<\/a><\/em>.<\/p>\n

[C4] Vasundhara Damodaran, Ziyu Liu, Jae-sun Seo and Arindam Sanyal, “A 138-TOPS\/W Delta-Sigma Modulator-Based Variable-Resolution Activation In-Memory Computing Macro”, IEEE Custom Integrated Circuits Conference (CICC)<\/em>, 2023. [PDF]<\/a><\/em><\/p>\n

\n

2022<\/h4>\n

[J1] Sudarsan Sadasivuni, Sumukh Bhanushali, Imon Banerjee and Arindam Sanyal, “In-sensor neural network for high energy efficiency analog-to-information conversion”, Nature Scientific Reports, 2022<\/em>.[PDF]<\/a><\/em><\/p>\n

[J2]Amartya Bhattacharya, Sudarsan Sadasivuni, Chieh-Ju Chao, Pradyumna Agasthi, Chadi Ayoub, David R Holmes, Reza Arsanjani, Arindam Sanyal, and Imon Banerjee, “Multi-modal fusion model for predicting adverse cardiovascular outcome post percutaneous coronary intervention”, Physiological Measurements, 2022.[PDF]<\/a> <\/em><\/p>\n

[J3] Sudarsan Sadasivuni, Monjoy Saha, Neal Bhatia, Imon Banerjee and Arindam Sanyal, “Fusion of Fully Integrated Analog Machine Learning Classifier with Electronic Medical Records for Real-time Prediction of Sepsis Onset”, Nature Scientific Reports, 2022<\/em>. [PDF]<\/a><\/em><\/p>\n

[J4] Xiyuan Tang, Jiaxin Liu, Yi Shen, Shaolan Li, Linxiao Shen, Arindam Sanyal, Kareem Ragab and Nan Sun, “Low-Power SAR ADC Design: Overview and Survey of State-of-the-Art Techniques”,\u00a0IEEE Transactions on Circuits and Systems-I, vol. 69, no. 6, pp. 2249-2262, 2022.<\/em>\u00a0[PDF]<\/a><\/p>\n

[C1] Sudarsan Sadasivuni, Sumukh Bhanushali, Imon Banerjee and Arindam Sanyal, “A 43.6 TOPS\/W AI Classifier with Sensor Fusion for Sepsis Onset Prediction”, IEEE Biomedical Circuits and Systems Conference (BioCAS), 2022.[PDF]<\/a><\/em><\/p>\n

[C2] Sudarsan Sadasivuni, Vasundhara Damodaran, Imon Banerjee and Arindam Sanyal, “Real-time prediction of cardiovascular diseases using reservoir-computing and fusion with electronic medical record”, IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS) 2022. [PDF]<\/a><\/em><\/p>\n

[C3] Sudarsan Sadasivuni, Monjoy Saha, Sumukh Bhanushali, Imon Banerjee and Arindam Sanyal, “Real-Time Sepsis Prediction Using Fusion of on-Chip Analog Classifier and Electronic Medical Record”, IEEE International Symposium on Circuits and Systems (ISCAS) 2022.[PDF]<\/a><\/em><\/p>\n

\n

2021<\/h4>\n

[J1] Sanjeev T. Chandrasekaran, \u00a0Sumukh P. Bhanushali, Imon Banerjee, and Arindam Sanyal, \u201cTowards Real-Time, At-Home Patient Health Monitoring using Reservoir Computing CMOS IC”,\u00a0 IEEE Journal on Emerging and Selected Topics in Circuits and Systems<\/em>, vol. 11, no. 4, pp. 829-839, 2021. [PDF]<\/a><\/em><\/p>\n

[J2] Sanjeev T. Chandrasekaran, \u00a0Sumukh P. Bhanushali, Stefano Pietri, and Arindam Sanyal, \u201cOTA-free 1-1 MASH ADC using Fully Passive Noise Shaping SAR & VCO ADC”, IEEE Journal of Solid-State Circuits<\/em>, pp. 1100-1111, vol. 57, no.\u00a0 4, 2021.[PDF]<\/a><\/em><\/p>\n

[J3] Sanjeev Tannirkulam Chandrasekaran, Abraham Peedikayil Kuruvila, Kanad Basu, and Arindam Sanyal, “Real-Time Hardware Based Malware and Micro-architectural Attack Detection Utilizing CMOS Reservoir Computing”, IEEE Transactions on Circuits and Systems-II, <\/em>vol. 69, no. 2, <\/em>pp. 349-353, 2022. [PDF]<\/a><\/em><\/p>\n

[J4] Sanjeev Tannirkulam Chandrasekaran, Akshay Jayaraj, Vinay Elkoori Ghantala Karnam, Imon Banerjee, and Arindam Sanyal, “Fully Integrated Analog Machine Learning Classifier Using Custom Activation Function for Low Resolution Image Classification”, \u00a0IEEE Transactions on Circuits and Systems-I<\/em>, vol. 68, no. 3, pp. 1023-1033, 2021.[PDF]<\/a><\/em><\/p>\n

[C1] Sudarsan Sadasivuni, Sumukh P. Bhanushali, Sai S. Singamsetti, Imon Banerjee, and Arindam Sanyal, “Multi-Task Learning Mixed-Signal Classifier for In-situ Detection of Atrial Fibrillation and Sepsis”, IEEE Biomedical Circuits and Systems Conference (BioCAS), 2021.[PDF]<\/a><\/em><\/p>\n

[C2] Sanjeev T. Chandrasekaran, Imon Banerjee, and Arindam Sanyal,\u201c7.5nJ\/inference CMOS Echo State Network for Coronary Heart Disease prediction\u201d, IEEE European Solid-State Circuits Conference (ESSCIRC), 2021.[PDF]<\/a><\/em><\/p>\n

[C3] Sanjeev T. Chandrasekaran, \u00a0Sumukh P. Bhanushali, Stefano Pietri, and Arindam Sanyal, \u201cOTA-free 1-1 MASH ADC using Fully Passive Noise Shaping SAR & VCO ADC\u201d, IEEE Symposia on VLSI Technology and Circuits (VLSI-C),\u00a02021.[PDF]<\/a><\/em><\/p>\n

[C4] Sudarsan Sadasivuni, Rahul Chowdhury, Vinay E. G. Karnam, Imon Banerjee, and Arindam Sanyal, “Recurrent Neural Network Circuit for Automated Detection of Atrial Fibrillation from Raw ECG”, IEEE International Symposium on Circuits and Systems (ISCAS) 2021.[PDF]<\/a><\/em><\/p>\n

[C5] Sanjeev \u00a0T. Chandrasekaran, Akshay Jayaraj, Naveen Ramesh, and Arindam Sanyal, “33-200Mbps, 3pJ\/Bit True Random Number Generator Based on CT Delta-Sigma Modulator”, IEEE International Symposium on Circuits and Systems (ISCAS) 2021.[PDF]<\/a><\/em><\/p>\n

[C6] Shibo Zhou, Xiaohua Li, Ying Chen, Sanjeev T. Chandrasekaran, and Arindam Sanyal, “Temporal-Coded Deep Spiking Neural Network with Easy Training and Robust Performance”, 35th AAAI Conference on Artificial Intelligence, (AAAI-21)<\/em>, 2021.[PDF]<\/a><\/em><\/p>\n

\n

2020<\/h4>\n

[J1] Junyu Lai, Sanjeev Tannirkulam Chandrasekaran, Arindam Sanyal, and Jung-Hun Seo, “Flexible CMOS Chip Converted by A Novel Chip Transformation Process”, IET Electronics Letters<\/em>, vol. 56, no. 24, pp. 1335-1337, 2020.[PDF]<\/a><\/em><\/p>\n

[J2] Sanjeev Tannirkulam Chandrasekaran, Stefano Pietri, and Arindam Sanyal, “21fJ\/step OTA-Less, Mismatch-Tolerant Continuous-Time VCO-Based Band-Pass ADC”, IEEE Solid-State Circuits Letters (special section for ESSCIRC)<\/em>, vol. 3, pp. 342-345, 2020.[PDF]<\/a><\/em><\/p>\n

[J3] Sanjeev Tannirkulam Chandrasekaran, Sumukh Prashant Bhanushali, Imon Banerjee, and Arindam Sanyal, “A Bio-Inspired Reservoir-Computer for Real-Time Stress Detection from ECG Signal”, IEEE Solid-State Circuits Letters (special section for ESSCIRC)<\/em>, vol. 3, pp. 290-293, 2020.[PDF]<\/a><\/em><\/p>\n

[J4] Mohammadhadi Danesh, Aishwarya Bahudhanam Venkatasubramaniyan, Gaurav Kapoor, Naveen Ramesh, Sudarsan Sadasivuni, Sanjeev Tannirkulam Chandrasekaran, and Arindam Sanyal, “Unified Analog PUF and TRNG based on Current Steering DAC and VCO”, \u00a0IEEE Transactions on Very Large Scale Integration Systems<\/em>, vol. 28, no. 11, pp. 2280-2289, 2020.[PDF]<\/a><\/em><\/p>\n

[J5] Sanjeev Tannirkulam Chandrasekaran, Vinay Elkoori Ghantala Karnam, and Arindam Sanyal, “0.36mW, 52Mbps True Random Number Generator Based on a Stochastic Delta-Sigma Modulator”, \u00a0IEEE Solid-State Circuits Letters (special section for ESSCIRC)<\/em>, vol. 3, pp. 190-193, 2020.[PDF]<\/a><\/em><\/p>\n

[J6] Shibo Zhou, Ying Chen, Xiaohua Li, and Arindam Sanyal, “Deep SCNN-based Real-time Object Detection for Self-driving Vehicles Using LiDAR Temporal Data”, \u00a0IEEE Access<\/em>, 2020.[PDF]<\/a><\/em><\/p>\n

[J7] Sanjeev Tannirkulam Chandrasekaran, Gaurav Kapoor, and Arindam Sanyal, “8fJ\/step Bandpass ADC with Digitally Assisted NTF Re-configuration”, \u00a0IEEE Transactions on Circuits and Systems-I, \u00a0<\/em>vol. 67, no. 10, pp. 3262-3272, 2020 (invited from MWSCAS).[PDF]<\/a><\/em><\/p>\n

[J8] Mohammadhadi Danesh, and Arindam Sanyal, “0.13pW\/Hz Ring VCO-Based Continuous-Time Read-Out ADC for Bio-Impedance Measurement”, \u00a0IEEE Transactions on Circuits and Systems-II, <\/em>vol. 67, no. 12, pp. 2823-2827,\u00a0<\/em>2020.[PDF]<\/a><\/em><\/p>\n

[J9] Sanjeev Tannirkulam Chandrasekaran, Ruobing Hua, Imon Banerjee, and Arindam Sanyal,”A Fully-Integrated Analog Machine Learning Classifier \u00a0for Breast Cancer Classification”, (invited paper) MDPI Electronics,<\/em>\u00a0vol. 9, no., 3, 2020.<\/p>\n

[J10] Yanlong Zhang, Arindam Sanyal, Xueyi Yu, Xing Quan, Kailin Wen, Xiyuan Tang, Gang Jin, Li Geng, Nan Sun,”A Fractional-N PLL With Space-Time Averaging for Quantization Noise Reduction”, IEEE Journal of Solid-State Circuits<\/em>, vol. 55, no. 3, pp. 602-614, 2020.[PDF]<\/a><\/em><\/p>\n

[J11] Akshay Jayaraj, Nimish Nitin Gujarati, Illakiya Venkatesh and Arindam Sanyal, “0.6V-1.2V, 0.22pJ\/bit True Random Number Generator Based on SAR ADC”, \u00a0IEEE Transactions on Circuits and Systems-II, \u00a0<\/em>vol. 6, no. 10, pp. 1765-1769, 2020.[PDF]<\/a><\/em><\/p>\n

[J12] Abilash Venkatesh, Aishwarya Bahudhanam Venkatasubramaniyan, Xiaodan Xi, and Arindam Sanyal, “0.3pJ\/bit Machine Learning Resistant Strong PUF using Subthreshold Voltage Divider Array”, \u00a0IEEE Transactions on Circuits and Systems-II, <\/em>vol. 67, no. 8, pp. 1394-1398, 2020.[PDF]<\/a><\/em><\/p>\n

[C1] Sudarsan Sadasivuni, Sanjeev T. Chandrasekaran, and Arindam Sanyal, “Neural Networks for Authenticating Integrated Circuits Based on Intrinsic Nonlinearity”, IEEE International\u00a0Midwest Symposium on Circuits and Systems (MWSCAS), 2020 (Invited Paper).[PDF]<\/a><\/i><\/em><\/p>\n

[C2] Sumukh P. Bhanushali, Sudarsan Sadasivuni, Imon Banerjee, and Arindam Sanyal, “Digital Machine Learning Circuit for Real-Time Stress Detection from Wearable ECG Sensor”, IEEE International\u00a0Midwest Symposium on Circuits and Systems (MWSCAS), 2020.\u00a0[PDF]<\/a><\/i><\/em><\/p>\n

[C3] Sanjeev T. Chandrasekaran, and Arindam Sanyal, “Stochastic Delta-Sigma VCO-ADC Utilizing 4x Staggered Averaging”, \u00a0IEEE International Symposium on Circuits and Systems (ISCAS) 2020.[PDF]<\/a><\/em><\/p>\n

\n

2019<\/h4>\n

[J1] Akshay Jayaraj, Mohammadhadi Danesh, Sanjeev Tannirkulam Chandrasekaran, and Arindam Sanyal, “76dB DR, 48fJ\/step Second-Order VCO-Based Delta-Sigma Current-to-Digital Converter”, IEEE Transactions on Circuits and Systems-I (invited from ISCAS),<\/em>\u00a0vol. 67, no. 4, pp. 1149-1157, 2019.[PDF]<\/a><\/p>\n

[J2] Shaolan Li, Arindam Sanyal, Kyoungtae Lee, Yeonam Yoon, Xiyuan Tang, Yi Zhong, Kareem Ragab and Nan Sun, “Advances in Voltage-Controlled-Oscillator-Based \u0394\u03a3 ADCs”, ICICE Transactions on Electronics, vol. 102, no. 7, pp. 509-519, 2019 (invited submission).\u00a0[PDF]<\/a><\/em><\/p>\n

[J3] Akshay Jayaraj, Mohammadhadi Danesh, Sanjeev Tannirkulam Chandrasekaran, and Arindam Sanyal, “Highly Digital Second-Order \u2206\u03a3 VCO ADC”, \u00a0IEEE Transactions on Circuits and\u00a0Systems-I, \u00a0vol. 66, no. 7, pp. 2415-2425, 2019.[PDF]<\/a><\/em><\/p>\n

[C1] Akshay Jayaraj, Abhijit Das, Srinivas Arcot and Arindam Sanyal, “8.6fJ\/Step VCO-Based CT 2nd-Order Delta Sigma ADC”, \u00a0IEEE Asian Solid-State Circuits Conference (A-SSCC), 2019.[PDF]<\/a><\/em><\/p>\n

[C2] Ruobing Hua and Arindam Sanyal, “39fJ Analog Artificial Neural Network for Breast Cancer Classification in 65nm CMOS”, IEEE International\u00a0Midwest Symposium on Circuits and Systems (MWSCAS), 2019.[PDF]<\/a><\/i><\/p>\n

[C3] Sanjeev T. Chandrasekaran and Arindam Sanyal, “A Single Channel Bandpass SAR ADC with Digitally Assisted NTF Re-Configuration”, \u00a0IEEE International\u00a0Midwest Symposium on Circuits and Systems (MWSCAS),<\/i> 2019.[PDF]<\/a><\/em><\/p>\n

[C4] Sanjeev T. Chandrasekaran and Arindam Sanyal, “A Highly Digital VCO-Based Asynchronous Analog-to-Time Converter”, \u00a0IEEE International\u00a0Midwest Symposium on Circuits and Systems (MWSCAS),<\/i> 2019.[PDF]<\/a><\/em><\/p>\n

[C5] Mohammadhadi Danesh and Arindam Sanyal, “Fully Digital 1-1 MASH VCO-Based ADC Architecture”, IEEE International\u00a0Midwest Symposium on Circuits and Systems (MWSCAS),<\/i> 2019.[PDF]<\/a><\/em><\/p>\n

[C6] Mohammadhadi Danesh, Aishwarya Bahudhanam, Gaurav Kapoor and Arindam Sanyal, “A 0.36pJ\/Bit Analog PUF Based on Current Steering DAC and VCO”, \u00a0IEEE International\u00a0Midwest Symposium on Circuits and Systems (MWSCAS),<\/i> 2019.[PDF]<\/a><\/em><\/p>\n

[C7] Abilash Venkatesh and Arindam Sanyal, “A Machine Learning Resistant Strong PUF using Subthreshold Voltage Divider Array in 65nm CMOS”, IEEE International Symposium on Circuits and Systems (ISCAS)<\/em>\u00a02019.[PDF]<\/a><\/em><\/p>\n

[C8] Akshay Jayaraj, Imon Banerjee and Arindam Sanyal, “Common-Source Amplifier Based Analog Artificial Neural Network Classifier”, IEEE International Symposium on Circuits and Systems (ISCAS)<\/em>\u00a02019.[PDF]<\/a><\/em><\/p>\n

[C9] Akshay Jayaraj, Mohammadhadi Danesh, Sanjeev T. Chandrasekaran and Arindam Sanyal, “0.43nJ, 0.48pJ\/step Second-Order \u0394\u2211 Current-to-Digital Converter \u00a0for IoT Applications”, IEEE International Symposium on Circuits and Systems (ISCAS)<\/em>\u00a02019.[PDF]<\/a><\/em><\/p>\n

[C10] Yanlong Zhang, Arindam Sanyal, Xing Quan, Kailin Wen, Xiyuan Tang, Gang Jin, Li Geng and Nan Sun, “A 2.4-GHz \u0394\u03a3 Fractional-N Synthesizer with Space-Time Averaging for Noise Reduction,” IEEE Custom Integrated Circuits Conference <\/em>(CICC), \u00a02019.[PDF]<\/a><\/p>\n

[C11] Mohammadhadi Danesh, Akshay Jayaraj, Sanjeev T. Chandrasekaran and Arindam Sanyal, “Ultra-Low Power Analog Multiplier Based on Translinear principle”, IEEE International Symposium on Circuits and Systems (ISCAS) 2019.[PDF]<\/a><\/em><\/p>\n

\n
2018<\/h5>\n

[J1] Akshay Jayaraj, Sanjeev Tannirkulam Chandrasekaran, Archana Ganesh, Imon Banerjee and Arindam Sanyal, “Maximum Likelihood Estimation based SAR ADC”, \u00a0IEEE Transactions on Circuits and\u00a0Systems-II, vol. 66, no. 8, pp. 1311-1315, 2018.[PDF]<\/a><\/em><\/p>\n

[J2] Sanjeev Tannirkulam Chandrasekaran, Akshay Jayaraj, Mohammadhadi Danesh and Arindam Sanyal, “Highly Digital Second-Order Oversampling TDC”, IEEE Solid-State Circuits Letters, vol. 1, no. 5, pp. 114-117, 2018.[PDF]<\/a><\/em><\/p>\n

[J3] B. Ghanavati, E. Abiri, M. R. Salehi, A. Keyhani and A. Sanyal,\u201cAn Energy-Efficient SAR ADC with Lowest Total Switching Energy Consumption”, Analog<\/em>\u00a0Integrated Circuits and Signal Processing<\/em>, vol. 97, no. 1, pp. 123-133, 2018.<\/em><\/p>\n

[C1] Mohammadhadi Danesh, \u00a0Sanjeev T. Chandrasekaran and Arindam Sanyal, “Ring Oscillator Based Delta-Sigma ADCs”, IEEE ICECS (invited paper), pp. 113-116, 2018.[PDF]<\/a><\/em><\/p>\n

[C2] Yi Zhong, Shaolan Li, Arindam Sanyal, Xiyuan Tang, Linxiao Shen, Siliang Wu, Nan Sun, “A Second-Order Purely VCO-Based CT \u0394\u2211 ADC Using a Modified DPLL in 40-nm CMOS”, IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 93-94, 2018.[PDF]<\/a><\/em><\/p>\n

[C3] Sanjeev T. Chandrasekaran and Arindam Sanyal, “A Digital PLL Based 2nd-Order \u2206\u03a3 Bandpass Time-Interleaved ADC”, IEEE MWSCAS, pp. 286-289, 2018.[PDF]<\/a><\/em><\/p>\n

[C4] Aishwarya Bahudhanam and Arindam Sanyal, “Physically Unclonable Functions Based on Voltage Divider Arrays in Subthreshold Region”, \u00a0IEEE International\u00a0Midwest Symposium on Circuits and Systems (MWSCAS)<\/i>, pp. 845-848, \u00a02018.[PDF]<\/a><\/em><\/p>\n

[C5] Arindam Sanyal, Shaolan Li and Nan Sun, “Low-power Scaling-friendly Ring Oscillator based \u0394\u03a3 ADC”, IEEE International Symposium on Circuits and Systems (ISCAS)<\/em>, pp. 1-5, 2018.[PDF]<\/a><\/em><\/p>\n

\n

2017 and earlier<\/h4>\n

[J1] B. Ghanavati, E. Abiri, M. R. Salehi, A. Keyhani and A. Sanyal, “LSB Split Capacitor SAR ADC with 99.2% Switching Energy Reduction”, \u00a0Analog Integrated Circuits and Signal Processing, vol. 93, no. 2, pp. 375-382,<\/em>\u00a02017.<\/p>\n

[J2] Imon Banerjee and Arindam Sanyal, \u201cStatistical estimator for simultaneous noise and mismatch suppression in SAR ADC\u201d, \u00a0Electronics Letters, vol. 53, no. 12, pp. 6\u20138, 2017.\u00a0[PDF]<\/a><\/em><\/p>\n

[J3] Arindam Sanyal and Nan Sun, \u201cAn Energy-Efficient Hybrid SAR-VCO \u2206\u03a3 Capacitance-to-Digital Converter in 40nm CMOS\u201d, IEEE Journal of Solid-State Circuits, vol. 52, no. 7, pp. 1966\u20131976, 2017. [PDF<\/a>]<\/em><\/p>\n

[J4] Long Chen, Xiyuan Tang, Arindam Sanyal, Yeonam Yoon, Jie Cong, and Nan Sun, \u201cA 0.7-V 0.6-uW 100-kS\/s Low-Power SAR ADC With Statistical Estimation-Based Noise Reduction\u201d, IEEE\u00a0Journal of Solid-State Circuits, vol. 52, no. 5, pp. 1388\u20131398, 2017.\u00a0[PDF]<\/a><\/em><\/p>\n

[J5] Arindam Sanyal and Nan Sun, \u201cA second-order VCO-based delta sigma ADC using a modified DPLL\u201d, Electronics Letters, vol. 52, no. 14, pp. 1204\u20131205, 2016.[PDF]<\/a><\/em><\/p>\n

[J6] Long Chen, Kareem Ragab, Xiyuan Tang, Jeonggoo Song, Arindam Sanyal, and Nan Sun, \u201cA 0.95-mW 6-b 700-Ms\/s single-channel loop-unrolled SAR ADC in 40-nm CMOS\u201d, \u00a0 IEEE TCAS-II, 2016.[PDF]<\/a><\/em><\/p>\n

[J7] Arindam Sanyal, Xueyi Yu, Yanlong Zhang, and Nan Sun, \u201cFractional-N PLL with multi-element fractional divider for noise reduction\u201d, Electronics Letters, vol. 52, no. 10, pp. 809\u2013810,\u00a02016.[PDF]<\/a><\/em><\/p>\n

[J8] Arindam Sanyal and Nan Sun, \u201cDynamic element matching techniques for static and dynamic errors in continuous-time multi-bit \u2206\u03a3 modulators\u201d, IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), pp. 561\u2013573, 2015.[PDF]<\/a><\/em><\/p>\n

[J9] Arindam Sanyal, Long Chen, and Nan Sun, \u201cDynamic element matching with signal-independent element transition rates for multibit delta sigma modulators\u201d, IEEE Transactions on Circuits and Systems\u2013I, pp. 1325\u20131334, May,\u00a02015.[PDF]<\/a><\/em><\/p>\n

[J10] Manzur Rahman, Arindam Sanyal, and Nan Sun, \u201cA novel hybrid radix-3\/radix-2 SAR ADC with fast convergence and low hardware complexity\u201d, IEEE Transactions on Circuits and Systems\u2013II, pp. 426-430, May. 2015.[PDF]<\/a><\/em><\/p>\n

[J11] Kareem Ragab, Long Chen, Arindam Sanyal, and Nan Sun, \u201cDigital background calibration for pipelined ADCs based on comparator decision time quantization\u201d, IEEE Transactions on Circuits and Systems\u2013II, pp. 456-460,\u00a0May. 2015.[PDF]<\/a><\/em><\/p>\n

[J12] Arindam Sanyal, Peijun Wang and Nan Sun, \u201cA thermometer-like mismatch shaping technique with minimum element transition activity for multi-bit delta-sigma DACs\u201d, IEEE Transactions on Circuits and Systems\u2013II, pp. 461\u2013465,\u00a02014.[PDF]<\/a><\/em><\/p>\n

[J13] Arindam Sanyal and Nan Sun, \u201cAn energy-efficient, low frequency-dependence switching technique for SAR ADC\u201d, IEEE Transactions on Circuits and Systems\u2013II, pp. 294\u2013298, 2014.[PDF]<\/a><\/em><\/p>\n

[J14] Arindam Sanyal and Nan Sun, \u201cA SAR ADC with 98% reduction in switching energy over conventional scheme\u201d, Electronics Letters, pp. 248\u2013250, Feb 2013.[PDF]<\/a><\/em><\/p>\n

[C1] Vaishak Prathap, Sanjeev T. Chandrasekaran, and Arindam Sanyal, \u201c2nd-Order VCO-Based CT \u2206\u03a3 ADC Architecture\u201d, IEEE International\u00a0Midwest Symposium on Circuits and Systems (MWSCAS)<\/i>, pp. 687-690, 2017.[PDF]<\/a><\/em><\/p>\n

[C2] Arindam Sanyal and Nan Sun, \u201cA 18.5 fJ\/step VCO-Based 0-1 MASH \u2206\u03a3 ADC with Digital Background Calibration\u201d, IEEE Symposia on VLSI Technology and Circuits (VLSI-C), pp. 26\u201327, 2016.[PDF]<\/a><\/em><\/p>\n

[C3] Long Chen, Arindam Sanyal, Ji Ma, and Nan Sun, \u201cComparator common-mode variation effects analysis and its application in SAR ADCs,\u201d, IEEE International Symposium on Circuits and Systems (ISCAS), 2016.[PDF]<\/a><\/em><\/p>\n

[C4] Arindam Sanyal and Nan Sun, \u201cA 55fJ\/conv-step VCO-Based \u2206\u03a3 Capacitance-to-Digital Converter in 40nm CMOS\u201d, IEEE European Solid-State Circuits Conference (ESSCIRC), pp. 385\u2013388, 2016.<\/em>[PDF]<\/a><\/p>\n

[C5] Long Chen, Xiyuan Tang, Arindam Sanyal, Yeonam Yoon, Jie Cong, and Nan Sun, \u201cA 10.5-b ENOB 645nW 100kS\/s SAR ADC with Statistical Estimation Based Noise Reduction\u201d, IEEE Custom Integrated Circuits Conference<\/em>\u00a0CICC, pp. 1\u20134,\u00a0Sept. 2015.<\/em>[PDF]<\/a><\/p>\n

[C6] Arindam Sanyal, Kareem Ragab, Long Chen, T. R. Viswanathan, Shouli Yan and Nan Sun, \u201cA hybrid SAR-VCO \u2206\u03a3 ADC with first-order noise shaping\u201d, IEEE IEEE Custom Integrated Circuits Conference (CICC) , pp. 1\u20134, 2014.<\/em>[PDF]<\/a><\/p>\n

[C7] Long Chen, Arindam Sanyal, Ji Ma and Nan Sun, \u201cA 24-uW 11-bit 1-MS\/s SAR ADC with a bidirectional single-side switching technique\u201d, IEEE European Solid-State Circuits Conference (ESSCIRC), pp. 219\u2013222, 2014.<\/em>[PDF]<\/a><\/p>\n

[C8] Arindam Sanyal and Nan Sun, \u201cAn enhanced ISI shaping technique for multi-bit delta sigma DACs\u201d, IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2341\u20132344, 2014.<\/em>[PDF]<\/a><\/p>\n

[C9] Arindam Sanyal and Nan Sun, \u201cA low frequency-dependence, energy-efficient switching technique for bottom-plate sampled SAR ADC\u201d, IEEE International Symposium on Circuits and Systems (ISCAS), pp. 297\u2013300, 2014.<\/em>[PDF]<\/a><\/p>\n

[C10] Arindam Sanyal and Nan Sun, \u201cA very high energy-efficiency switching technique for SAR ADCs\u201d, IEEE International\u00a0Midwest Symposium on Circuits and Systems (MWSCAS)<\/i>, pp. 229\u2013232, 2013.<\/em>[PDF]<\/a><\/p>\n

[C11] Wenjuan Guo, Youngchun Kim, Arindam Sanyal, Ahmed Tewfik and Nan Sun, \u201cA single SAR ADC converting multi-channel sparse signals\u201d, IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2235\u20132238, 2013.<\/em>[PDF]<\/a><\/p>\n

[C12] Arindam Sanyal and Nan Sun, \u201cA Simple and Efficient Dithering Method for Vector Quantizer Based Mismatch-Shaped Delta Sigma DACs \u201d, IEEE International Symposium on Circuits and Systems (ISCAS), pp. 528\u2013531, 2012.<\/em>[PDF]<\/a><\/p>\n

[C13] Arindam Sanyal and Tarun Kanti Bhattacharyya, \u201cMaximizing the sequence length in a MASH Delta Sigma Modulator by dithering\u201d, IEEE MTT-S International Microwave Symposium, pp. 1665\u20131668,\u00a0June 2009.<\/em><\/p>\n","protected":false},"excerpt":{"rendered":"

2026 [C1] Tushar Gupta, Vasundhara Damodaran, Yuan Liao, Jae-sun Seo, and Arindam Sanyal, \u201cDelta-Sigma Modulator-Based Compute-in-Memory Neural Network with Analog Feature Extraction and Classification for Edge Sensors”, IEEE International Symposium on Circuits and Systems (ISCAS) […]<\/p>\n","protected":false},"author":135,"featured_media":0,"parent":0,"menu_order":10,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-21","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/labs.engineering.asu.edu\/mixedsignals\/wp-json\/wp\/v2\/pages\/21","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/labs.engineering.asu.edu\/mixedsignals\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/labs.engineering.asu.edu\/mixedsignals\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/labs.engineering.asu.edu\/mixedsignals\/wp-json\/wp\/v2\/users\/135"}],"replies":[{"embeddable":true,"href":"https:\/\/labs.engineering.asu.edu\/mixedsignals\/wp-json\/wp\/v2\/comments?post=21"}],"version-history":[{"count":4,"href":"https:\/\/labs.engineering.asu.edu\/mixedsignals\/wp-json\/wp\/v2\/pages\/21\/revisions"}],"predecessor-version":[{"id":991,"href":"https:\/\/labs.engineering.asu.edu\/mixedsignals\/wp-json\/wp\/v2\/pages\/21\/revisions\/991"}],"wp:attachment":[{"href":"https:\/\/labs.engineering.asu.edu\/mixedsignals\/wp-json\/wp\/v2\/media?parent=21"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}