{"id":172,"date":"2023-07-04T00:25:40","date_gmt":"2023-07-04T00:25:40","guid":{"rendered":"https:\/\/labs.engineering.asu.edu\/advent\/?page_id=172"},"modified":"2026-04-22T19:45:18","modified_gmt":"2026-04-22T19:45:18","slug":"publications","status":"publish","type":"page","link":"https:\/\/labs.engineering.asu.edu\/advent\/publications\/","title":{"rendered":"Publications"},"content":{"rendered":"\n

C=Conference Papers, J=Journal Articles, P=Posters, T=Thesis\/Dissertations, R=Project\/Technical Reports, A=Arxiv<\/strong><\/p>\n\n\n\n

2026<\/h2>\n\n\n\n

[C13] Evaluating Computing Platforms for Sustainability: A Comparative Analysis of FPGAs against ASICs, GPUs, and CPUs [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Chetan Choppali Sudarshan, Aman Arora, Vidya A. Chhabria
Publication Details<\/strong>: Arxiv, April 2026
Project Tags<\/strong>: FPGA, Sustainable computing<\/p>\n\n\n\n

[A6] CHICO-Agent: An LLM Agent for the Cross-layer Optimization of 2.5D and 3D Chiplet-based Systems [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Qihang Wu, Aman Arora, Vidya A. Chhabria
Publication Details<\/strong>: Arxiv, April 2026
Project Tags<\/strong>: CAD, LLM<\/p>\n\n\n\n

[C26] LUNA: LUT-Based Neural Architecture for Fast and Low-Cost Qubit Readout [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Muhammad Ali Farooq, Giuseppe Di Guglielmo, Abhi Rajagopala, Nhan Tran, Aman Arora
Publication Details<\/strong>: Design Automation Conference (DAC), July 2026
Project Tags<\/strong>: Hardware Acceleration of Machine Learning, Quantum Control<\/p>\n\n\n\n

[W6] Programming Domain-Specific FPGA Hardblocks from HLS: An RTL Blackbox Approach [PDF<\/a>]<\/mark> <\/h4>\n\n\n\n

Authors<\/strong>: Ruthwik Reddy Sunketa, Jeevesh Choudhury, Aman Arora
Publication Details<\/strong>: Workshop Paper, Reconfigurable Architectures Workshop (RAW), May 2026
Project Tags<\/strong>: FPGA, HLS, CAD<\/p>\n\n\n\n

[P11] Accelerating Topology Optimization on AMD Versal AIE-ML Engines<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Kaustubh Manohar Mhatre, Vedant Tewari, Aditya Ray, Farhan Khan, Ridwan Olabiyi,, Ashif Iquebal, Aman Arora
Publication Details<\/strong>: Poster, International Symposium on Field-Programmable Custom Computing Machines (FCCM), May 2026
Project Tags<\/strong>: Hardware Acceleration of Machine Learning<\/p>\n\n\n\n

[A6] Understanding Inference-Time Token Allocation and Coverage Limits in Agentic Hardware Verification [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Vihaan Patel, Vidya Chhabria, Aman Arora
Publication Details<\/strong>: Arxiv 2026
Project Tags<\/strong>: ML for Hardware<\/p>\n\n\n\n

[A5] Spec2Cov: An Agentic Framework for Code Coverage Closure of Digital Hardware Designs [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Sean Lowe, Elias Hilaneh, Alma Babbit, Nakul Gopalan, Vidya Chhabria, Aman Arora
Publication Details<\/strong>: Arxiv 2026
Project Tags<\/strong>: ML for Hardware<\/p>\n\n\n\n

[A4] Accelerating CRONet on AMD Versal AIE-ML Engines [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Kaustubh Manohar Mhatre, Vedant Tewari, Aditya Ray, Farhan Khan, Ridwan Olabiyi,, Ashif Iquebal, Aman Arora
Publication Details<\/strong>: Arxiv 2026
Project Tags<\/strong>: Hardware Acceleration of Machine Learning<\/p>\n\n\n\n

[A3] RACAM: Enhancing DRAM with Reuse-Aware Computation and Automated Mapping for ML Inference [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Siyuan Ma, Jiajun Hu, Jeeho Ryoo, Aman Arora, Lizy Kurian John
Publication Details<\/strong>: Arxiv 2026
Project Tags<\/strong>: Processing In Memory<\/p>\n\n\n\n

[A2] CarbonPATH: Carbon-aware pathfinding and architecture optimization for chiplet-based AI systems [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Chetan Choppali Sudarshan, Jiajun Hu, Aman Arora, Vidya A Chhabria
Publication Details<\/strong>: Arxiv 2026
Project Tags<\/strong>: Sustainable Computing<\/p>\n\n\n\n

[J9] Azure-Lily: An FPGA Architecture with Analog IMC Engines for Efficient AI [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Archit Gajjar, Ruthwik Sunketa, Lei Zhao, Omar Eldash, Aishwarya Natarajan, Giacomo Pedretti, Aman Arora, Paolo Faraboschi, Jim Ignowski, Luca Buonanno
Publication Details<\/strong>: ACM Transactions on Architecture and Code Optimization (TACO), February 2026
Project Tags<\/strong>: FPGA<\/p>\n\n\n\n

[C25] Closing the Loop on FPGA Verification: An Iterative Framework for Maximizing Routing Resource Coverage [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Ruthwik Reddy Sunketa, Aman Arora
Publication Details<\/strong>: International Symposium on Field Programmable Gate Arrays (ISFPGA), February 2026
Project Tags<\/strong>: FPGA, ML for Hardware<\/p>\n\n\n\n

[P10] MARU: An ML-Based Framework for Area Estimation from FPGA Resource Usage [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Tarun Kholay, Anup Ashok Kedilaya, Aman Arora, Jaydeep P. Kulkarni, Lizy K John
Publication Details<\/strong>: Poster, International Symposium on Field Programmable Gate Arrays (ISFPGA), February 2026
Project Tags<\/strong>: FPGA, ML for Hardware<\/p>\n\n\n\n

2025<\/h2>\n\n\n\n

[J8] XPNet: Cross-FPGA Power Prediction from High Level Language Code[PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Zhigang Wei, Allison Seigler, Sean Lowe, Emily Shriver, Aman Arora, Lizy K John
Publication Details<\/strong>: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), December 2025
Project Tags<\/strong>: FPGA<\/p>\n\n\n\n

[J7] OpenFPGA-NoC: Automated Fabric and Bitstream Generation for NoC-based FPGAs [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Ruthwik Reddy Sunketa, Muhammad Ali Farooq, Ganesh Gore, Allen Boston, Pierre-Emmanuel Gaillardon, Aman Arora
Publication Details<\/strong>: ACM Transactions on Reconfigurable Technology and Systems (TRETS), September 2025
Project Tags<\/strong>: FPGA Architecture<\/p>\n\n\n\n

[C24] ATAPP: Architecture and Technology Aware Power Predictor for Unseen FPGAs [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Zhingang Wei, Aman Arora, Emily Shriver, Lizy K. John
Publication Details<\/strong>: Conference Proceedings, International Conference on Field-Programmable Logic and Applications (FPL), September 2025
Project Tags<\/strong>: FPGA, ML for Hardware<\/p>\n\n\n\n

[C23] GAMA: High-Performance GEMM Acceleration on AMD Versal ML-Optimized AI Engines [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Kaustubh Manohar Mhatre, Endri Taka Aman Arora
Publication Details<\/strong>: Conference Proceedings, International Conference on Field-Programmable Logic and Applications (FPL), September 2025
Project Tags<\/strong>: FPGA, Hardware Acceleration of Machine Learning<\/p>\n\n\n\n

[C22] CarbonSet: A Dataset to Analyze Trends and Benchmark the Sustainability of CPUs and GPUs [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Jiajun Hu, Chetan Choppali Sudharshan, Vidya A. Chhabria, Aman Arora
Publication Details<\/strong>: Conference Proceedings, ACM Great Lakes Symposium on VLSI (GLSVLSI), July 2025
Project Tags<\/strong>: Sustainable Computing<\/p>\n\n\n\n

[A1] SAF: Scalable Acceleration Framework for Dynamic and Flexible Scaling of FPGAs [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Masudul Hassan Quraishi, Michael Riera, Fengbo Ren, Aman Arora, Aviral Shrivastava
Publication Details<\/strong>: Arxiv 2025
Project Tags<\/strong>: FPGA<\/p>\n\n\n\n

[J6] Field-Programmable Gate Array Architecture for Deep Learning: Survey and Future Directions [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Andrew Boutrous, Aman Arora, Vaughn Betz
Publication Details<\/strong>: Proceedings of the IEEE ( Volume: 113, Issue: 7), June 2025
Project Tags<\/strong>: FPGA, ML for Hardware<\/p>\n\n\n\n

[P9] CarbonSet: A Dataset to Analyze Trends and Benchmark the Sustainability of CPUs and GPUs [PDF<\/a>] <\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Jiajun HU, Chetan Choppali Sudarshan, Maxwell Clifford, Vidya, A. Chhabria, Aman Arora
Publication Details<\/strong>: Work in Progress Poster, Design Automation Conference (DAC), June 2025
Project Tags<\/strong>: FPGA, Hardware Acceleration of Machine Learning<\/p>\n\n\n\n

[W5] High Throughput Low Latency Network Intrusion Detection on FPGAs: a Raw Packet Approach<\/mark> [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Muhammad Ali Farooq, Abid Rafique, Suhaib A. Fahmy, Aman Arora
Publication Details<\/strong>: Workshop Paper, Reconfigurable Architectures Workshop (RAW), June 2025
Project Tags<\/strong>: FPGA, Hardware Acceleration of Machine Learning<\/p>\n\n\n\n

[C21] Compute-In-Memory on FPGAs for Deep Learning: A Review [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Aman Arora
Publication Details<\/strong>: Conference Proceedings, IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), May 2025
Project Tags<\/strong>: FPGA, Hardware Acceleration of Machine Learning<\/p>\n\n\n\n

[P10] Analog In-memory Computing Enhanced FPGA for High-Throughput and Energy-Efficient Acceleration [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: A. Gajjar, L. Zhao, O. Eldash, A. Natarajan, X. Sheng, G. Pedretti, P. Faraboschi, J. Ignowski, A. Arora, L. Buonanno
Publication Details<\/strong>: Conference Proceedings, IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), May 2025
Project Tags<\/strong>: FPGA, Hardware Acceleration of Machine Learning<\/p>\n\n\n\n

[C20] Performance Analysis of GEMM Workloads on the AMD Versal Platform<\/strong> [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Kaustubh Manohar Mhatre, Venkata Guru Prasanth Mulleti, Curt John Bansil, Endri Taka, Aman Arora
Publication Details<\/strong>: Conference Proceedings, International Symposium on Performance Analysis of Systems and Software (ISPASS), May 2025
Project Tags<\/strong>: FPGA, Hardware Acceleration of Machine Learning<\/p>\n\n\n\n

[C19] Systolic Sparse Tensor Slices: FPGA Building Blocks for Sparse and Dense AI Acceleration [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Endri Taka, Ning-Chi Huang, Chi-Chih Chang, Kai-Chiang Wu, Aman Arora, Diana Marculescu
Publication Details<\/strong>: Conference Proceedings, International Symposium on Field Programmable Gate Arrays (ISFPGA), March 2025
Project Tags<\/strong>: FPGA, Hardware Acceleration of Machine Learning<\/p>\n\n\n\n

[P8] Performance Analysis of GEMM Workloads on the AMD Versal Platform [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Kaustubh Mhatre, Prashant Mulleti, Curt Bansil, Endri Taka, Aman Arora
Publication Details<\/strong>: Poster, International Symposium on Field Programmable Gate Arrays (ISFPGA), March 2025
Project Tags<\/strong>: FPGA<\/p>\n\n\n\n

[P7] High Throughput Low Latency Network Intrusion Detection on FPGAs: a Raw Packet Approach [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Muhammad Ali Farooq, Abid Rafique, Suhaib A. Fahmy, Aman Arora
Publication Details<\/strong>: Poster, International Symposium on Field Programmable Gate Arrays (ISFPGA), March 2025
Project Tags<\/strong>: FPGA, Hardware Acceleration of Machine Learning<\/p>\n\n\n\n

2024<\/h2>\n\n\n\n

[C18] Out-of-the-Box Performance of FPGAs for ML Workloads using Vitis AI [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Deepak Kumar Athur, Rutuparn Pawar, Aman Arora
Publication Details<\/strong>: Conference Proceedings, International Symposium on Applied Reconfigurable Computing (ARC), January 2025
Project Tags<\/strong>: FPGA, Hardware Acceleration of Machine Learning
Other<\/strong>: Best Paper Candidate<\/span><\/p>\n\n\n\n

[C17] Beyond the Surface: The Necessity for Detailed Metrics in Corporate Sustainability Reports [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Chetan Choppali Sudarshan, Aman Arora, Vidya A. Chhabria
Publication Details<\/strong>: Conference Proceedings, International Green and Sustainable Computing Conference, November 2024
Project Tags<\/strong>: Sustainable computing<\/p>\n\n\n\n

[J5] PIMSAB: A Processing-In-Memory System with Spatially-Aware Communication and Bit-Serial-Aware Computation [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Siyuan Ma, Kaustubh Mhatre, Jian Weng, Bagus Hanindhito, Zhengrong Wang, Tony Nowatzki, Lizy K. John, Aman Arora
Publication Details<\/strong>: ACM Transactions on Architecture and Code Optimization, August 2024
Project Tags<\/strong>: Hardware Acceleration of Machine Learning, Processing in Memory<\/p>\n\n\n\n

[C16] HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond [PDF<\/a>]<\/mark>[ACM<\/a>]<\/h4>\n\n\n\n

Authors<\/strong>: Stefan Abi-Karam, Rishov Sarkar, Allison Seigler, Sean Lowe, Zhigang Wei, Hanqiu Chen, Nanditha Rao, Lizy Kurian John, Aman Arora, Callie Hao
Publication Details<\/strong>: Conference Proceedings, ACM\/IEEE International Symposium on Machine Learning for CAD (MLCAD), September 2024
Project Tags<\/strong>: HLS, Dataset, ML for Hardware, FPGA
Other<\/strong>: Best Paper Award<\/span><\/p>\n\n\n\n

[C15] LogicNets vs. ULEEN : Comparing two novel high throughput edge ML inference techniques on FPGA[PDF<\/a>]<\/mark>[]<\/h4>\n\n\n\n

Authors<\/strong>: Shashank Nag, Zachary Susskind, Aman Arora, Alan T. L. Bacellar, Diego L. C. Dutra,Igor D. S. Miranda, Krishnan Kailas, Eugene B. John, Mauricio Breternitz Jr., Priscila M. V. Lima, Felipe M. G. Franca, and Lizy K. John
Publication Details<\/strong>: Conference Proceedings, IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), August 2024
Project Tags<\/strong>: Weightless Neural Networks, Hardware Acceleration of Machine Learning, FPGA<\/p>\n\n\n\n

[W4] Efficient FPGA-based power model adaption with Transfer-Learning and Meta-Learning []<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Zhigang Wei, Aman Arora, Emily Shriver, and Lizy K. John
Publication Details<\/strong>: Workshop Paper, Workshop on Cognitive Architectures (COGARCH’ 2024), June 2024
Project Tags<\/strong>: FPGA, ML for Hardware, HLS, Dataset<\/p>\n\n\n\n

[W3] An Open-Source Framework for High-Level Synthesis Dataset generation for Machine Learning [PDF]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Stefan Abi-Karam, Rishov Sarkar, Allison Seigler, Sean Lowe, Zhigang Wei, Hanqiu Chen, Nanditha Rao, Lizy John, Aman Arora, Cong Hao
Publication Details<\/strong>: Workshop Paper, Open-Source Computer Architecture Research (OSCAR), June 2024
Project Tags<\/strong>: FPGA, ML for Hardware, HLS, Dataset<\/p>\n\n\n\n

[C14] Efficient Approaches for GEMM Acceleration on Leading AI-Optimized FPGAs [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Endri Taka, Dimitrios Gourounas, Andreas Gerstlauer, Diana Marculescu, Aman Arora
Publication Details<\/strong>: Conference Proceedings, IEEE International Symposium On Field-Programmable Custom Computing Machines (FCCM), May 2024
Project Tags<\/strong>: FPGA, Reconfigurable Computing Architectures, Hardware Acceleration of Machine Learning<\/p>\n\n\n\n

[C13] GreenFPGA: Evaluating FPGAs as Environmentally Sustainable Computing Solutions [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Chetan Choppali Sudarshan, Aman Arora, Vidya A. Chhabria
Publication Details<\/strong>: Design Automation Conference (DAC), June 2024
Project Tags<\/strong>: FPGA, Sustainable computing<\/p>\n\n\n\n

[P6] Cross-FPGA Power Estimation from High Level Synthesis via Transfer-Learning [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Zhigang Wei, Aman Arora, Emily Shriver, Lizy K. John
Publication Details<\/strong>: Poster, ACM International Symposium on Field-Programmable Gate Arrays (FPGA), February 2024
Project Tags<\/strong>: FPGA, ML for Hardware <\/p>\n\n\n\n

2023<\/h2>\n\n\n\n

[J4] ULEEN: A Novel Architecture for Ultra-low-energy Edge Neural Networks[PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Zachary Susskind, Arora Aman, Igor D. S Miranda, Alan T. L. Bacellar, Luis A. Q. Villon, Rafael F. Katopodis, Leandro S., Diego L. C. Dutra, Priscila M. V. Lima, Felipe M. G., Mauricio Breternitz Jr. and Lizy K John
Publication Details<\/strong>: ACM Transactions on Architecture and Code Optimization, 2023
Project Tags<\/strong>: FPGA, EDGE inference<\/p>\n\n\n\n

[C12] MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine [PDF<\/a>][IEEE]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Endri Taka, Aman Arora, Kai-Chiang Wu, Diana Marculescu
Publication Details<\/strong>: Conference Proceedings, IEEE International Conference on Field Programmable Technology (FPT), October 2023
Project Tags<\/strong>: Hardware Acceleration of Machine Learning, AI Engine, Matrix Multiplication<\/p>\n\n\n\n

[C11] HLSDataset: Open-Source Dataset for ML-Assisted FPGA Design using High Level Synthesis<\/strong> [PDF<\/a>][IEEE]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Zhigang Wei, Aman Arora, Ruihao Li, Lizy K. John
Publication Details<\/strong>: Conference Proceedings, IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP), July 2023
Project Tags<\/strong>: Machine Learning for CAD, Datasets for Machine Learning<\/p>\n\n\n\n

[P5] COIN: Combinational Intelligent Networks<\/strong> [PDF<\/a>][IEEE]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Igor D. S. Miranda, Aman Arora, Zachary Susskind, Josias S. A. Souza, Mugdha P. Jadhao, Luis A. Q. Villon, Diego L. C. Dutra, Priscila M. V. Lima, Felipe M. G. Fran\u00e7a, Mauricio Breternitz and Lizy K. John
Publication Details<\/strong>: Poster, IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP), July 2023
Project Tags<\/strong>: Weightless Neural Networks, Hardware Acceleration of Machine Learning<\/p>\n\n\n\n

[W2] <\/strong><\/strong>ML4Accel: An Open-Source Dataset for ML-Guided Accelerator Design [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Zhigang Wei, Aman Arora, Ruihao Li, Lizy John
Publication Details<\/strong>: Workshop Paper, Open-Source Computer Architecture Research (OSCAR), June 2023
Project Tags<\/strong>: Datasets<\/p>\n\n\n\n

[W1] Koios: Open-Source Deep Learning Benchmarks for FPGA Research<\/strong><\/strong> [PDF<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Aman Arora, Lizy K. John
Publication Details<\/strong>: Workshop Paper, Open-Source Computer Architecture Research (OSCAR), June 2023
Project Tags<\/strong>: FPGA Benchmarks, Reconfigurable Computing Architecture and CAD<\/p>\n\n\n\n

[J3] Koios 2.0: Open-Source Deep Learning Benchmarks for FPGA Architecture and CAD Research<\/strong><\/strong> [PDF<\/a><\/strong>][IEEE<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Aman Arora, Andrew Boutros, Seyed Alireza Damghani, Karan Mathur, Vedant Mohanty, Tanmay Anand, Mohamed Elgammal, Kenneth B. Kent, Vaughn Betz, Lizy K. John
Publication Details<\/strong>: Journal Article, IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems (TCAD), May 2023
Project Tags<\/strong>: FPGA Benchmarks, Reconfigurable Computing Architecture and CAD<\/p>\n\n\n\n

[J2] CoMeFa: Deploying Compute-in-Memory on FPGAs for Deep Learning Acceleration [PDF<\/a><\/strong>][ACM<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Aman Arora, Atharva Bhamburkar, Aatman Borda, Tanmay Anand, Rishabh Sehgal, Bagus Hanindhito, Pierre-Emmanuel Gaillardon, Jaydeep Kulkarni, Lizy K. John
Publication Details<\/strong>: Journal Article, ACM Transactions on Reconfigurable Technology and Systems (TRETS), June 2023 
Project Tags<\/strong>: Reconfigurable Computing Architectures, Processing In Memory, Hardware for Machine Learning<\/p>\n\n\n\n

[P4] An FPGA-Based Weightless Neural Network for Edge Network Intrusion Detection [PDF<\/a><\/strong>][ACM]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Zachary Susskind, Aman Arora, Alan Bacellar, Diego L. C. Dutra, Igor D. S. Miranda, Mauricio Breternitz Jr., Priscila M. V. Lima, Felipe M. G. Franca, Lizy K. John
Publication Details<\/strong>: Poster, ACM International Symposium on Field-Programmable Gate Arrays (FPGA), February 2023
Project Tags<\/strong>: Weightless Neural Networks, Hardware Acceleration of Machine Learning, FPGA Applications<\/p>\n\n\n\n

2022<\/h2>\n\n\n\n

[C10] Weightless Neural Networks for Efficient Edge Inference<\/mark><\/strong>[PDF<\/a>][ACM]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Zachary Susskind, Aman Arora, Igor D. S. Miranda, Luis A. Q. Villon, Rafael F. Katopodis, Leandro S. de Araujo, Diego L. C. Dutra, Priscila M. V. Lima, Felipe M. G. Franca, Mauricio Breternitz Jr., Lizy K. John
Publication Details<\/strong>: Conference Proceedings, Parallel Architectures and Compilation Techniques (PACT), October 2022 
Project Tags<\/strong>: Weightless Neural Networks, Hardware Acceleration of Machine Learning<\/p>\n\n\n\n

[C9] Pruning Weightless Neural Networks<\/strong> [<\/strong>PDF<\/strong><\/a>]<\/strong><\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Zachary Susskind, Alan T. L. Bacellar, Aman Arora, Luis A. Q. Villon, Renan Mendanha, Leandro S. de Araujo, Diego L. C. Dutra, Priscila M. V. Lima, Felipe M. G. Franca, Igor D. S. Miranda, Mauricio Breternitz Jr., Lizy K. John
Publication Details<\/strong>: Conference Proceedings, European Symposium on Artificial Neural Networks, Computational Intelligence and Machine Learning (ESANN), October 2022 
Project Tags<\/strong>: Weightless Neural Networks, Machine Learning Theory<\/p>\n\n\n\n

[J1] Tensor Slices: FPGA Building Blocks For The Deep Learning Era [PDF<\/a>][ACM]<\/mark><\/strong><\/h4>\n\n\n\n

Authors<\/strong>: Aman Arora, Moinak Ghosh, Samidh Mehta, Vaughn Betz and Lizy K. John
Publication Details<\/strong>: Journal Article, ACM Transactions on Reconfigurable Technology and Systems (TRETS), August 2022 
Project Tags<\/strong>: Reconfigurable Computing Architectures, Hardware for Machine Learning<\/p>\n\n\n\n

[C8] LogicWiSARD: Memoryless Synthesis of Weightless Neural Networks [PDF<\/a>][IEEE]<\/mark><\/strong><\/h4>\n\n\n\n

Authors<\/strong>: Igor Dantas Dos Santos Miranda, Aman Arora, Zachary Susskind, Lizy K. John, Luis Armando Quintanilla Villon, Rafael Fontella Katopodis, Diego Leonel Cadette Dutra, Priscila Machado Vieira Lima, Felipe Maia Galvao Franca, Leandro Santiago de Araujo, Mauricio Breternitz Jr.
Publication Details<\/strong>: Conference Proceedings, IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), July 2022
Project Tags<\/strong>: Weightless Neural Networks
Other<\/strong>: Best Paper Candidate<\/span><\/p>\n\n\n\n

[C7] CoMeFa: Compute-in-Memory Blocks for FPGAs<\/strong> [PDF<\/a>][IEEE][Video<\/a>]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Aman Arora, Tanmay Anand, Aatman Borda, Rishabh Sehgal, Bagus Hanindhito, Jaydeep Kulkarni and Lizy K. John
Publication Details<\/strong>: Conference Proceedings, IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), May 2022 
Project Tags<\/strong>: Reconfigurable Computing Architectures, Processing In Memory, Hardware for Machine Learning
Other<\/strong>: Best Paper Award<\/span><\/p>\n\n\n\n

[P3] Hardware-aware 3D Model Workload Selection and Characterization for Graphics and ML Applications<\/strong>[PDF<\/a>][IEEE]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Ruihao Li, Aman Arora, Sikan Li, Qinzhe Wu and Lizy K. John
Publication Details<\/strong>: Poster, IEEE International Symposium on Quality Electronic Design (ISQED), April 2022 
Project Tags<\/strong>: Workload Characterization<\/p>\n\n\n\n

[C6] LogGen: A Parameterized Generator for Designing Floating-Point Logarithm Units for Deep Learni<\/strong>ng [PDF<\/a>][IEEE]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Pragnesh Patel, Aman Arora, Earl Swartzlander and Lizy K. John
Publication Details<\/strong>: IEEE International Symposium on Quality Electronic Design (ISQED), April 2022 
Project Tags<\/strong>: Hardware for Machine Learning<\/p>\n\n\n\n

[P2] MathRAMs: Configurable Fused Compute-Memory Blocks for FPGAs<\/strong> [PDF<\/a>][ACM]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Aman Arora, Aatman Borda, Tanmay Anand, Bagus Hanindhito, Lizy K. John
Publication Details<\/strong>: Conference Poster, ACM International Symposium on Field-Programmable Gate Arrays (FPGA), February 2022
Project Tags<\/strong>: Reconfigurable Computing Architectures, Processing In Memory, Hardware for Machine Learning<\/p>\n\n\n\n

2021<\/h2>\n\n\n\n

[C5] Compute RAMs: Adaptable Compute and Storage Blocks for DL-Optimized FPGA<\/strong> [PDF<\/a>][IEEE]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Aman Arora, Bagus Hanindhito, Lizy K. John
Publication Details<\/strong>: Conference Proceedings, IEEE Asilomar Conference on Signals, Systems, and Computers (ASILOMAR), October 2021 
Project Tags<\/strong>: Reconfigurable Computing Architectures, Processing In Memory, Hardware for Machine Learning
Other<\/strong>: Student Paper Contest Finalist, Top-8 out of 477<\/span><\/p>\n\n\n\n

[C4] Koios: A Deep Learning Benchmark Suite for FPGA Architecture and CAD Research [PDF<\/a>][IEEE][Video<\/a>] <\/mark><\/strong><\/h4>\n\n\n\n

Authors<\/strong>: Aman Arora, Andrew Boutros, Daniel Rauch, Aishwarya Rajen, Aatman Borda, Seyed Alireza Damghani, Samidh Mehta, Sangram Kate, Pragnesh Patel, Kenneth B. Kent, Vaughn Betz, Lizy K. John
Publication Details<\/strong>: IEEE International Conference on Field-Programmable Logic and Applications (FPL), August 2021
Project Tags<\/strong>: FPGA Benchmarks, Reconfigurable Computing Architecture and CAD<\/p>\n\n\n\n

[C3] Tensor Slices to the Rescue: Supercharging ML Acceleration on FPGAs [PDF<\/a>][ACM][Video<\/a>]<\/mark><\/strong><\/h4>\n\n\n\n

Authors<\/strong>: Aman Arora, Samidh Mehta, Vaughn Betz, Lizy K. John
Publication Details<\/strong>: ACM International Symposium on Field-Programmable Gate Arrays (FPGA), February 2021
Project Tags<\/strong>: Reconfigurable Computing Architectures, Hardware for Machine Learning<\/p>\n\n\n\n

2020<\/h2>\n\n\n\n

[C2] Hamamu: Specializing FPGAs for ML Applications by Adding Hard Matrix Multiplier Blocks [PDF<\/a>][IEEE][<\/strong>Video<\/strong><\/a>]<\/strong> <\/mark><\/strong><\/h4>\n\n\n\n

Authors<\/strong>: Aman Arora, Zhigang Wei, Lizy K. John
Publication Details<\/strong>: IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), July 2020
Project Tags<\/strong>: Reconfigurable Computing Architectures, Hardware for Machine Learning<\/p>\n\n\n\n

[C1] Design Space Exploration of Softmax Implementations [PDF<\/a>]<\/strong>[IEEE]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Zhigang Wei, Aman Arora, Lizy K. John
Publication Details<\/strong>: Conference Proceedings, IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), July 2020
Project Tags<\/strong>: Machine Learning Acceleration<\/p>\n\n\n\n

[R1] A TPU-like Design for FPGA Benchmarking<\/strong> [PDF<\/a>]<\/mark><\/strong><\/h4>\n\n\n\n

Authors<\/strong>: Aman Arora, Bagus Hanindhito, Harsh Gugale, Lizy K. John
Publication Details<\/strong>: Technical Report
Project Tags<\/strong>: Machine Learning Acceleration<\/p>\n\n\n\n

[P1] The Case for Hard Matrix Multiplier Blocks in an FPGA [PDF<\/a>]<\/strong>[ACM]<\/mark><\/h4>\n\n\n\n

Authors<\/strong>: Aman Arora, Zhigang Wei, Lizy K. John
Publication Details<\/strong>: Poster, ACM International Symposium on Field-Programmable Gate Arrays (FPGA), February 2020
Project Tags<\/strong>: Reconfigurable Computing Architectures, Hardware for Machine Learning<\/p>\n\n\n\n

<\/p>\n","protected":false},"excerpt":{"rendered":"

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ChhabriaPublication Details: Arxiv, April 2026Project Tags: FPGA, Sustainable computing [A6] CHICO-Agent: An LLM Agent for the Cross-layer Optimization of 2.5D…<\/p>\n","protected":false},"author":228,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_acf_changed":false,"footnotes":""},"class_list":["post-172","page","type-page","status-publish","hentry"],"acf":[],"yoast_head":"\nPublications - Advent Lab<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/labs.engineering.asu.edu\/advent\/publications\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Publications - Advent Lab\" \/>\n<meta property=\"og:description\" content=\"C=Conference Papers, J=Journal Articles, P=Posters, T=Thesis\/Dissertations, R=Project\/Technical Reports, A=Arxiv 2026 [C13] Evaluating Computing Platforms for Sustainability: A Comparative Analysis of FPGAs against ASICs, GPUs, and CPUs [PDF] Authors: Chetan Choppali Sudarshan, Aman Arora, Vidya A. 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