Projects

Current Projects

Novel architectures for PIM on FPGAs (Theme #1 and Theme #4)

In collaboration with AMD

Accelerating quantum control systems using FPGAs (Theme #2)

In collaboration with Prof. Abhi (University of Arkansas and LBL) and Dr. Nhan Tran (Fermilab)

Accelerating matrix multiplication workloads on AMD Versal platform (Theme #2)

Using both AIE and AIE-ML engines

LLM acceleration on AMD Ryzen AI platform (Theme #2)

In collaboration with AMD and Prof. Aviral Shrivastava (ASU)

Digital twin acceleration on AMD Versal reconfigurable devices (Theme #2)

In collaboration with Prof. Ashif Iqebal (ASU)

Novel techniques for FPGA verification (Theme #1)

LLM assisted hardware verification (Theme #3)

In collaboration with Prof. Vidya Chhabria (ASU) and Prof. Nakul Gopalan (ASU)

DRAM PIM based acceleration for ML workloads (Theme #4)

In collaboration with Prof. Lizy John (UT Austin) and Prof. Jeeho Ryo (Fairleigh Dickinson University)

Path finding for novel chiplet-based disaggregated architectures (Theme #4)

In collaboration with Prof. Vidya Chhabria (ASU)

Sustainability and FPGAs (Theme #4)

In collaboration with Prof. Vidya Chhabria (ASU)

Past Projects

Developing datasets and frameworks for ML for FPGA CAD (Theme #3)

In collaboration with Prof. Lizy John (UT Austin) and Prof. Callie Hao (Georgia Tech)

SRAM PIM based accelerator and compiler for ML workloads (Theme #4)

In collaboration with Prof. Tony Nowatzki (UCLA) and Prof. Lizy John (UT Austin)

Cross-FPGA power prediction using ML (Theme #3)

In collaboration with Prof. Lizy John (UT Austin)

Architecture of next-gen reconfigurable devices (Theme #1)

In collaboration with Prof. Diana Marculescu (UT Austin)

Accelerating ML workloads using AMD Vitis AI Suite (Theme #2)

Comparing out-of-the-box performance of FPGAs using AMD Vitis AI Suite with TPUs

Analyzing and comparing AI-optimized FPGAs (Theme #2)

In collaboration with Prof. Andreas Gerstualer and Prof. Diana Maruclescu (UT Austin)

Novel FPGA architectures for ML – Introducing Tensor Slices (Theme #1)

Work done while at University of Texas at Austin, in collaboration with University of Toronto

Incorporating Processing-In-Memory on FPGAs – Introducing CoMeFa RAMs (Theme #1 and #4)

Work done while at University of Texas at Austin

Benchmarks for FPGA architecture and CAD – Introducing Koios Benchmarks (Theme #1)

Work done while at University of Texas at Austin, in collaboration with University of Toronto and University of New Brunswick

Accelerating Weightless Neural Networks on FPGAs (Theme #2)

Work done while at University of Texas at Austin, in collaboration with researchers from Brazil, Portugal and Texas